Avago-technologies LSI53C1030 Manuel d'utilisateur

®DB14-000156-05LSI53C1030 PCI-X toDual Channel Ultra320SCSI MultifunctionControllerTECHNICALMANUALSeptember 2003Version 2.2

x ContentsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

4-14 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x30–0x33Expansion

PCI Configuration Space Register Description 4-15Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Capabilities Po

4-16 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x3DInterrupt PinRe

PCI Configuration Space Register Description 4-17Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x3FM

4-18 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0xXXPower Managemen

PCI Configuration Space Register Description 4-19Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0xXXP

4-20 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0xXXPower Managemen

PCI Configuration Space Register Description 4-21Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0xXXM

4-22 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Multiple Message Capable [3:1

PCI Configuration Space Register Description 4-23Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Message Address

Contents xiVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figures1.1 Typical LSI53C1030 Board Application 1-31

4-24 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0xXXPCI-X Capabilit

PCI Configuration Space Register Description 4-25Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.the LSI53C1030

4-26 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Data Parity Error Recovery En

PCI Configuration Space Register Description 4-27Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Designed Maximu

4-28 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Bus Number [15:8]These read o

PCI I/O Space and Memory Space Register Description 4-29Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 4

4-30 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x00System Doorbell

PCI I/O Space and Memory Space Register Description 4-31Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Sequenc

4-32 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.writes a value other than the

PCI I/O Space and Memory Space Register Description 4-33Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Registe

xii ContentsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

4-34 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Diagnostic Read/Write Data [3

PCI I/O Space and Memory Space Register Description 4-35Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Registe

4-36 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x34Host Interrupt

PCI I/O Space and Memory Space Register Description 4-37Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Doorbel

4-38 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller 5-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

5-2 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.1 Absolute Maximum Stress Ratings11. S

DC Characteristics 5-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.The core voltage must come up before I/O

5-4 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.2 LVD ReceiverVCM+−+++−−−VI2VI2Table

DC Characteristics 5-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.7 8 mA Bidirectional Signals — GP

Contents xiiiVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Tables2.1 PCI/PCI-X Bus Commands and Encodings 2-1

5-6 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.9 Input Signals1— CLK, CLKMODE_0, CLKM

TolerANT Technology Electrical Characteristics 5-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.5.2 TolerANT

5-8 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.3 Rise and Fall Time Test ConditionIL

AC Characteristics 5-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.4 SCSI Input Filtering5.3 AC Cha

5-10 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.5 External ClockTable 5.14 and Figur

External Memory Timing Diagrams 5-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.7 Interrupt Output

5-12 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.8 NVSRAM Read CycleFigure 5.8 NVSRAM

External Memory Timing Diagrams 5-13Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.17 and Figure 5.9 p

5-14 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.9 NVSRAM Write CycleFigure 5.9 NVSRA

External Memory Timing Diagrams 5-15Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.5.4.2 Flash ROM TimingTable

xiv ContentsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.4.8 PCI Memory [1] Address Map 4-294.9 Interrupt Si

5-16 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.10 Flash ROM Read Cycle (Cont.)Table

External Memory Timing Diagrams 5-17Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.11 Flash ROM Write

5-18 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.5.5 Package DrawingsFigure 5.12 illustrates t

Package Drawings 5-19Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.This page left blank intentionally.

5-20 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.12 LSI53C1030 456-Pin BGA Top ViewA1

Package Drawings 5-21Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.12 LSI53C1030 456-Pin BGA Top Vie

5-22 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.20 contains the pinout for the LSI53C

Package Drawings 5-23Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.20 LSI53C1030 Signal List by Signa

5-24 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.21 contains the pinout for the LSI53C

Package Drawings 5-25Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 5.21 LSI53C1030 Signal List by BGA P

Contents xvVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.A.2 LSI53C1030 PCI I/O Space Registers A-3A.3 LSI53C

5-26 SpecificationsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 5.13 456-Pin EPBGA (KY) Mechanical Dra

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller A-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

A-2 Register SummaryVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Expansion ROM Base Address 0x30–0x33 Read/W

A-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table A.2 LSI53C1030 PCI I/O Space RegistersRegister Name Of

A-4 Register SummaryVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table A.3 LSI53C1030 PCI I/O Space Register

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller IX-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rig

IX-2 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.BIOS 2-8, 2-27bit133 MHz capable 4-2764-bit address c

Index IX-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.record 2-27, 2-28space 2-8, 4-1write command 2-8, 2-1

IX-4 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.FIFODMA 2-4reply 4-37reply free 2-7reply post 2-7, 4-

Index IX-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.INTB/ 2-15line register 4-15message signalled 2-15, 2

xvi ContentsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

IX-6 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.message data register 4-23message frame address 4-37m

Index IX-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.dual address cycles command 2-10, 2-13dual function 3

IX-8 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.data scale bit 4-19data select bit 4-19device specifi

Index IX-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.reply queue 2-7REQ/ 2-15, 3-7, 5-6REQ/ACK offset, 2-1

IX-10 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.A_SD[15:0]+- 3-10A_SDP[1:0]+- 3-10A_SIO+- 3-12A_SMSG

Index IX-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.flash ROM/NVSRAM interface 3-14GPIO 3-19ground 3-20i

IX-12 IndexVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.transfer width 2-18transfersinformation units 2-21pa

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction ControllerVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights r

Customer FeedbackVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Reader’s CommentsFax your comments to: LSI Log

You can find a current list of our U.S. distributors, international distributors, and salesoffices and design resource centers on our web site athttp://

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller 1-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

1-2 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.The LSI53C1030 is pin compatible with the LSI53

General Description 1-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 1.1 Typical LSI53C1030 Board Appl

iiVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.This document contains proprietary information of LSI Logic C

1-4 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 1.2 Typical LSI53C1030 System Applicatio

Benefits of the Fusion-MPT Architecture 1-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.64 Kbyte stripes. The

1-6 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.reply messages per interrupt reduces context sw

Benefits of Ultra320 SCSI 1-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.bytes in the sequence. The LSI53C10

1-8 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.5 Benefits of SureLINK (Ultra320 SCSI Domain V

Benefits of TolerANT®Technology 1-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.7 Benefits of TolerANT®Techn

1-10 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.8 Summary of LSI53C1030 FeaturesThis section

Summary of LSI53C1030 Features 1-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.8.2 PCI PerformanceThe LSI

1-12 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.8.3 IntegrationThese features make the LSI53

Summary of LSI53C1030 Features 1-13Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.1.8.5 ReliabilityThese featu

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller iiiVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

1-14 IntroductionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller 2-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

2-2 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.1 Block Diagram DescriptionThe LSI5

Block Diagram Description 2-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 2.1 LSI53C1030 Block Diagra

2-4 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.1.1.1 PCI InterfaceThe LSI53C1030 p

Block Diagram Description 2-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.1.1.5 Shared RAMThe host interfa

2-6 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.B_LED/. The LSI53C1030 firmware contro

Fusion-MPT Architecture Overview 2-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.messages. When the host sys

2-8 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3 PCI Functional DescriptionThe hos

PCI Functional Description 2-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Bits AD[7:2] select one of the si

iv PrefaceVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.• Chapter 5, Specifications, provides the electrical a

2-10 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.The following sections describe how

PCI Functional Description 2-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.2.2 Special Cycle CommandThe

2-12 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.2.8 Alias to Memory Read Block C

PCI Functional Description 2-13Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.2.12 Memory Read Multiple Co

2-14 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.2.15 Memory Read Line CommandThi

PCI Functional Description 2-15Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.2.18 Memory Write Block Comm

2-16 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.implements its own MSI register set.

PCI Functional Description 2-17Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.3.6.1 Power State D0Power Stat

2-18 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.removes power from the LSI53C1030. D

Ultra320 SCSI Functional Description 2-19Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.4.1.3 Intersymbol In

Preface vVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.PCI Special Interest Group2575 N. E. KatherineHillsbor

2-20 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 2.2 Paced Transfer ExampleThe

Ultra320 SCSI Functional Description 2-21Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 2.3 Example of

2-22 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.overhead and maximizes bus bandwidth

Ultra320 SCSI Functional Description 2-23Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.margined check verifies

2-24 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.5 External Memory InterfaceThe LSI

External Memory Interface 2-25Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.is 128 Kbytes or more. Figure 2.4

2-26 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.5.2 NVSRAM InterfaceThe LSI53C1030

Serial EEPROM Interface 2-27Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 2.5 NVSRAM Diagram2.6 Serial

2-28 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.7 Zero Channel RAIDZero channel RA

Zero Channel RAID 2-29Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.cycles to the LSI53C1030 when the I/O pro

vi PrefaceVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.AdvanceVersion 0.12/2001 Initial release of document.

2-30 Functional DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.8 Multi-ICE Test InterfaceThis sec

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller 3-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

3-2 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.1 Signal OrganizationThe LSI53C1030 has

Signal Organization 3-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Figure 3.1 LSI53C1030 Functional Signal

3-4 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.2 PCI Bus Interface SignalsThis section

PCI Bus Interface Signals 3-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.2.2 PCI Address and Data Signals

3-6 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.2.3 PCI Interface Control SignalsTable

PCI Bus Interface Signals 3-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.2.4 PCI Arbitration SignalsTable

3-8 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.2.6 PCI Interrupt SignalsTable 3.6 desc

PCI-Related Signals 3-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.3 PCI-Related SignalsTable 3.7 describ

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller viiVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

3-10 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.4 SCSI Interface SignalsThe SCSI Inter

SCSI Interface Signals 3-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.A_VDDBIAS T1 O N/A A_VDDBIAS provide

3-12 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 3.10 describes the SCSI Channel [0

SCSI Interface Signals 3-13Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.4.2 SCSI Channel [1] SignalsTable

3-14 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 3.12 describes the SCSI Channel [1

Memory Interface 3-15Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.MAD[15:0] D22, E21, B25,D23, E22, C24,F22,

3-16 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 3.14 describes the serial EEPROM I

Test Interface 3-17Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.7 Test InterfaceTable 3.16 describes the J

3-18 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Table 3.17 lists the LSI Logic test sign

GPIO and LED Signals 3-19Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.8 GPIO and LED SignalsTable 3.18 des

viii ContentsVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.2.4 Ultra320 SCSI Functional Description 2-182.4.1

3-20 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.9 Power and Ground PinsTable 3.19 desc

Power-On Sense Pins Description 3-21Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.10 Power-On Sense Pins De

3-22 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.• MADP[1], Reserved.• MADP[0], PCI-X Mod

Power-On Sense Pins Description 3-23Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.• MAD[10], ID Control [0] –

3-24 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.• MAD[3], NVSRAM Select – By default, in

Internal Pull-Ups and Pull-Downs 3-25Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.3.11 Internal Pull-Ups and

3-26 Signal DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.

LSI53C1030 PCI-X to Dual Channel Ultra320 SCSI Multifunction Controller 4-1Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All righ

4-2 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Interrupts, and PCI-X) to opti

PCI Configuration Space Register Description 4-3Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x00–0

Contents ixVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.5.2 TolerANT Technology Electrical Characteristics 5

4-4 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.SERR/ Enable 8Setting this bit

PCI Configuration Space Register Description 4-5Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Enable I/O Space

4-6 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.DEVSEL/ for any bus command ex

PCI Configuration Space Register Description 4-7Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x08Re

4-8 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.for performing write cycles. P

PCI Configuration Space Register Description 4-9Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x0FRe

4-10 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Space [0] base address is 64

PCI Configuration Space Register Description 4-11Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x20–

4-12 PCI Host Register DescriptionVersion 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.Register: 0x2C–0x2DSubsystem

PCI Configuration Space Register Description 4-13Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.tinguish their