Avago-technologies LSI53C180 Manuel d'utilisateur

®S14041.CLSI53C180Ultra160 SCSIBus ExpanderTECHNICALMANUALJune 2001Version 1.3

x Contents3.12 Bidirectional SCSI Signals—A_SCD/, A_SIO/,A_SMSG/, A_SBSY/, A_SATN/, A_SSEL/, A_SRST/,B_SCD±, B_SIO±, B_SMSG±, B_SBSY±, B_SATN±,B_SSEL±

LSI53C180 Ultra3 SCSI Bus Expander 1-1Chapter 1IntroductionThis chapter describes the LSI53C180 Ultra160 SCSI Bus Expander andits applications. It inc

1-2 IntroductionFigure 1.1 LSI53C180 SCSI Bus ModesFigure 1.1 shows the two SCSI bus modes available on the A or B Side.LVD Link™ transceivers provide

General Description 1-31.1.1 Applications• Server clustering environments• Expanders creating distinct SCSI cable segments that are isolatedfrom each

1-4 IntroductionIn the second example, Figure 1.3, the LSI53C180 is cascaded toachieve four distinct SCSI segments. Segments A and D can be treatedas

General Description 1-51.1.2 Features• A flexible SCSI bus expander that supports any combination of LVDor SE transceivers• Creates distinct SCSI bus s

1-6 Introduction1.1.3 Specifications• 40 MHz Input Clock• 192-pin Plastic Ball Grid Array package (PBGA). This package is adrop in replacement for the

Ultra160 SCSI 1-7two bits in error, or other error types within a single 32-bit range aredetected. Refer to SPI-3 to see how CRC generation and transm

1-8 IntroductionSome features of integrated LVD Link multimode transceivers are:• Supports SE or LVD technology• Allows greater device connectivity an

LSI53C180 Ultra3 SCSI Bus Expander 2-1Chapter 2FunctionalDescriptionsThis chapter describes all signals, their groupings, and their functions. Itinclu

iiThis document contains proprietary information of LSI Logic Corporation. Theinformation contained herein is not to be used by or disclosed to third

2-2 Functional DescriptionsFigure 2.1 LSI53C180 Block DiagramIn its simplest form, the LSI53C180 passes data and parity from a sourcebus to a load bus

Interface Signal Descriptions 2-3device is taken from the MSG bytes during negotiation. For all devicesin the configuration to communicate accurately t

2-4 Functional DescriptionsLVD Link lowers the amplitude of noise reflections and allows highertransmission frequencies.The LVD Link transceivers in Si

Interface Signal Descriptions 2-52.1.5 DIFFSENS ReceiverThe LSI53C180 contains LVD DIFFSENS receivers that detect thevoltage level on the A Side or B

2-6 Functional DescriptionsSection 3.2.4, “SCSI Interface Timing.” Figure 2.2 shows the LSI53C180signal grouping. A description of the signal groups f

Interface Signal Descriptions 2-7asserting, deasserting, or releasing the SCSI signals is the source side.These steps describe the LSI53C180 data proc

2-8 Functional Descriptions1. The input signal is blocked if it is being driven by the LSI53C180.2. The next stage is a leading edge filter. This ensur

Interface Signal Descriptions 2-92. The next stage is a leading edge filter. This ensures that the outputwill not switch during a specified time after t

2-10 Functional Descriptions6. The last stage develops pull-up and pull-down signals with drive and3-state control.7. A parallel function ensures that

Interface Signal Descriptions 2-112.1.7.9 A and B Differential Sense (A_DIFFSENS and B_DIFFSENS)These control pins determine the mode of SCSI bus sign

Preface iiiPrefaceThis manual provides a description of the LSI53C180 Ultra160 SCSI BusExpander chip that supports all combinations of Single-Ended an

2-12 Functional Descriptionsfor an external chip reset if the power supply meets ramp upspecifications.2.1.8.2 Warm Swap Enable (WS_ENABLE/)This input

Interface Signal Descriptions 2-13pass from one bus to the other. The signal is asserted HIGH when thechip is active.2.1.8.4 Clock (CLOCK)This is the

2-14 Functional Descriptions2.2 Internal Control DescriptionsThis section provides information about self-calibration, delay linestructures, and busy

Internal Control Descriptions 2-152.2.2.2 REQ/ACKThese input clock signals get edge filtered and stretched to minimumvalues to avoid glitches. In DT cl

2-16 Functional Descriptions

LSI53C180 Ultra3 SCSI Bus Expander 3-1Chapter 3SpecificationsThis chapter provides the pin descriptions associated with theLSI53C180 as well as electri

3-2 SpecificationsFigure 3.1 Left Half of LSI53C180 192-Pin BGA Top ViewA1 A2 A3 A4 A5 A6 A7 A8 A9NCVDDIONC NC NC XFER_ACTIVE RESET/ A_DIFFSENS A_SD12-

Signal Descriptions 3-3Figure 3.2 Right Half of LSI53C180 192-Pin BGA Top ViewA10 A11 A12 A13 A14 A15 A16 A17A_SD13- A_SD14+ A_SD15+ A_SD0- A_SD1- A_S

3-4 SpecificationsFigure 3.3 LSI53C180 Functional Signal GroupingA_SSEL+A_SSEL-A_SBSY+A_SBSY-A_SRST+A_SRST-A_SREQ+A_SREQ-A_SACK+A_SACK-A_SMSG+A_SMSG-A_

Signal Descriptions 3-5Table 3.1 SCSI A Side Interface PinsSCSI A BGA Pin Type DescriptionA_SSEL+,− M15, M16 I/O A Side SCSI bus Select control signal

iv PrefaceENDL Publications14426 Black Walnut CourtSaratoga, CA 95070(408) 867-6642Document names: SCSI Bench Reference, SCSI Encyclopedia,SCSI TutorP

3-6 SpecificationsTable 3.2 SCSI B Side Interface PinsSCSI B Pin Type DescriptionB_SSEL+,− H2, J1 I/O B Side SCSI bus Select control signal.B_SBSY+,− M

Electrical Characteristics 3-73.2 Electrical CharacteristicsThis section specifies the DC and AC electrical characteristics of theLSI53C180. These elec

3-8 Specifications3.2.1 DC CharacteristicsTable 3.5 Absolute Maximum Stress Ratings1Symbol Parameter Min Max Units Test ConditionsTSTGStoragetemperatur

Electrical Characteristics 3-9Figure 3.4 LVD DriverTable 3.7 LVD Driver SCSI Signals—B_SD[15:0]±, B_SDP[1:0]±, B_SCD±, B_SIO±,B_SMSG±, B_SREQ±, B_SACK

3-10 SpecificationsFigure 3.5 LVD ReceiverTable 3.9 DIFFSENS SCSI SignalSymbol Parameter Min Max UnitsTestConditions11. Functional test specified for ea

Electrical Characteristics 3-11Table 3.11 Bidirectional SCSI Signals—A_SD[15:0]/, A_SDP[1:0]/,A_SREQ/, A_SACK/, B_SD[15:0]±, B_SDP[1:0]±,B_SREQ±, B_SA

3-12 SpecificationsFigure 3.6 External Reset CircuitTable 3.13 Input Control Signals—CLOCK, RESET/, WS_ENABLESymbol Parameter Min Max Units Test Condit

Electrical Characteristics 3-133.2.2 TolerANT Technology Electrical CharacteristicsTable 3.15 TolerANT Technology Electrical Characteristics1Symbol Pa

3-14 SpecificationsFigure 3.7 Rise and Fall Time Test ConditionstFFall time, 90% to 10% 4.0 18.5 ns Figure 3.7dVH/dt Slew rate, LOW to HIGH 0.15 0.50 V

Electrical Characteristics 3-15Figure 3.8 SCSI Input FilteringFigure 3.9 Hysteresis of SCSI ReceiversFigure 3.10 Input Current as a Function of Input

Preface vRevision RecordDate Version Remarks2/00 1.0 Version 1.011/00 1.1 All product names changed from SYM to LSI.4/01 1.2 Changes in Chapter 2 to h

3-16 SpecificationsFigure 3.11 Output Current as a Function of Output VoltageOutput Sink Current (milliamperes)0-200-400-600-800012345Output Voltage (V

Electrical Characteristics 3-173.2.3 AC CharacteristicsThe AC characteristics described in this section apply over the entirerange of operating condit

3-18 SpecificationsFigure 3.13 Input/Output Timing - Single TransitionTable 3.18 Output Timing - Single TransitionSymbol Parameter Min Max UnitstST5Out

Electrical Characteristics 3-19Figure 3.14 Input/Output Timing - Double TransitionTable 3.20 Output Timing - Double TransitionSymbol Parameter Min Max

3-20 Specifications3.3 Mechanical DrawingsLSI Logic component dimensions conform to a current revision of theJEDEC Publication 95 standard package outl

Mechanical Drawings 3-213.3.1 LSI53C180 192-Pin BGA Mechanical DrawingThe LSI53C180 is packaged in a 192-pin Plastic Ball Grid Array (PBGA).Figure 3.1

3-22 Specifications

LSI53C180 Ultra3 SCSI Bus Expander A-1Appendix AWiring DiagramsA.1 LSI53C180 Wiring DiagramsThe following four pages of wiring diagrams are of a typic

A-2 LSI53C180 Wiring DiagramsFigure A.1 LSI53C180 Wiring Diagram 1 of 4Storage Systems, Inc.LSI LOGIC

LSI53C180 Wiring Diagrams A-3Figure A.2 LSI53C180 Wiring Diagram 2 of 4Storage Systems, Inc.LSI LOGIC

vi Preface

A-4 LSI53C180 Wiring DiagramsFigure A.3 LSI53C180 Wiring Diagram 3 of 4Storage Systems, Inc.LSI LOGIC

LSI53C180 Wiring Diagrams A-5Figure A.4 LSI53C180 Wiring Diagram 4 of 4Storage Systems, Inc.LSI LOGIC

A-6 Wiring Diagrams

LSI53C180 Ultra3 SCSI Bus Expander B-1Appendix BGlossaryACK/ Acknowledge – Driven by an initiator, ACK/ indicates an acknowledgmentor a SCSI data tran

B-2 GlossaryCable SkewDelayCable skew delay is the minimum difference in propagation time allowedbetween any two SCSI bus signals measured between any

B-3ExternalConfigurationAll SCSI peripheral devices are external to the host enclosure.ExternalTerminatorThe terminator that exists on the last periphe

B-4 GlossaryLSB Abbreviation for Least Significant Bit or Least Significant Byte. Thatportion of a number, address or field that occurs right-most when i

B-5Phase One of the eight states to which the SCSI bus can be set. During eachphase, different communication tasks can be performed.Port A connection

B-6 GlossarySingle-EndedConfigurationAn electrical signal configuration that uses a single line for each signal,referenced to a ground path common to th

LSI53C180 Ultra3 SCSI Bus Expander IX-1IndexNumerics192-pin plastic ball grid array 1-63-state 2-7leakage 3-11AA_SACK 2-9, 3-5A_SATN 2-10, 3-5A_SBSY 2

Contents viiContentsChapter 1 Introduction1.1 General Description 1-11.1.1 Applications 1-31.1.2 Features 1-51.1.3 Specifications 1-61.2 Ultra160 SCSI

IX-2 IndexEelectrical characteristics 3-7 to 3-19electrostatic discharge 3-8enable/disable SCSI transfers 3-6ESD 3-8external configuration B-3external

Index IX-3definition B-5latch 2-7reconnectdefinition B-5recovery 2-10releasedefinition B-5reliability issue 2-3REQ B-5REQ/ACK input signals 2-15reques

IX-4 Index

LSI53C180 Ultra3 SCSI Bus ExpanderCustomer FeedbackWe would appreciate your feedback on this document. Please copy thefollowing page, add your comment

Customer FeedbackReader’s CommentsFax your comments to: LSI Logic CorporationTechnical PublicationsM/S E-198Fax: 408.433.4333Please tell us how you ra

U.S. Distributorsby StateA. E. Avnet Electronicshttp://www.hh.avnet.comB. M. Bell Microproducts,Inc. (for HAB’s)http://www.bellmicro.comI. E. Insight

U.S. Distributorsby State(Continued)New YorkHauppaugeI. E. Tel: 516.761.0960Long IslandA. E. Tel: 516.434.7400W. E. Tel: 800.861.9953RochesterA. E. Te

Direct SalesRepresentatives by State(Components and Boards)E. A. Earle AssociatesE. L. Electrodyne - UTGRP Group 2000I. S. Infinity Sales, Inc.ION ION

Sales Offices and DesignResource CentersLSI Logic CorporationCorporate Headquarters1551 McCarthy BlvdMilpitas CA 95035Tel: 408.433.8000Fax: 408.433.898

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viii ContentsChapter 3 Specifications3.1 Signal Descriptions 3-13.2 Electrical Characteristics 3-73.2.1 DC Characteristics 3-83.2.2 TolerANT Technology

International DistributorsAustraliaNew South WalesReptechnic Pty Ltd3/36 Bydown StreetNeutral Bay, NSW 2089♦Tel: 612.9953.9844Fax: 612.9953.9683Belgiu

Contents ix3.11 Output Current as a Function of Output Voltage 3-153.12 Clock Timing 3-163.13 Input/Output Timing - Single Transition 3-173.14 Input/O